SUBTHRESHOLD ADIAPATIC LOGIC BASED INVERTER DESIGN?

INVERTER DESIGN:

 In adiabatic logic circuits, ramp type supply voltage is used to slow down the charge transport mechanism Hence, the supply clock plays the pivotal role. A ramp type supply voltage φ(t) is considered in Fig. 1(a), which gradually swings in between logic 0 (Gnd potential) and logic 1 (VDD) in time duration 2T, where f (=1/2T ) is the supply clock’s frequency. The power supply waveform φ(t) can be divided into charging phase, when φ(t) ramps up from 0 to VDD in 0 to T unit time and discharging phase when φ(t) ramps
down from VDD to 0 in T to 2T unit time. Considering the charging phase, the voltage at any time instant can be expressed as

 

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